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CICS/TS Performance Tuning Using C\TREK

The following document provides an overview of the different topics covered in the seminar and the associated time.  C\TREK screens are only used to demonstrate/illustrate the information being discussed.  This seminar covers a lot of tuning material and will require 8 hours a day.  The total time for the seminar is 40 hours.  The detail topic agenda is also enclosed. 

  1. Introduction to CICS Performance Tuning – this section provides an overview of the areas that need to be addressed when tuning a production CICS system.  Among the topics is a discussion on response time in which the different aspects that make up response time are reviewed.  The components of response time, dispatch and wait times are reviewed in detail.  Specific constraints that affect CICS performance such as design, hardware and software are reviewed in detail.  This topic establishes the base for tuning the system and the trade offs that may be required in the process.

  2. Using Operating System Information to Tune CICS/TS – this section provides an overview of the different areas associated with the operating system that affect CICS/TS performance.  The importance of virtual and real storage to CICS/TS is introduced in this section and is covered in greater detail in follow on presentations.  Other z/OS areas that also affect CICS/TS performance such as VTAM, Auxiliary Storage Manager (ASM) and library definitions are reviewed. 

  3. Tuning CICS/TS Processor Cycles – this section addresses how CPU cycles are used by CICS and what you can do to tune the system to improve response time.   The use of CPU cycles by CICS running under a z/OS system requires attention because the work is dispatched under different operating system TCBs.  A typical CICS region can have multiple TCBs to be dispatched and the protection of the single threading of the QR KTCB has changed.  So, it is important to review those factors that affect CICS’ access to the processor.  A review of the CICS parameters that can have a direct or indirect effect on the use of CPU cycles is discussed.  Finally, things within the operating system that affect CICS CPU availability and application coding are discussed.

  4. Tuning Real Storage in CICS/TS – this section continues the information provided in the second section of this seminar.  CICS/TS response time is sensitive to paging activity.  Several CICS parameters that can be used to control real storage are reviewed in detail.  The concept of improved response time to ease storage problems is discussed in detail.  CICS parameters that can be used to help in a real storage situation are also reviewed.

  1. Tuning Virtual Storage in CICS/TS – this section completes the information provided in the second unit.  Virtual storage is the Achilles Heel of CICS/TS.  Different than real storage problems, lack of virtual storage can result in CICS/TS down time.  CICS parameters that can affect the amount of virtual storage are reviewed in detail.  The correct buffering of VSAM data sets is introduced in this section.  The major focus for tuning virtual storage is below the line.

  2.  Tuning CICS/TS Transaction Controls – this section reviews the more important “knobs and buttons” associated with the tuning of CICS.  SIT, transaction definition and program definition parameters are reviewed.  The setting of the timer parameters such as the ICV, ICVTSD and ICVR are discussed in detail, including transaction priority and priority ageing.

  3. Tuning On Line VSAM Files – this section provides the introduction on what must be done to tune VSAM files. Special emphasis is placed on the VSAM definition parameters and how to compute the correct disk space required for the file.  The section also reviews the how to handle browsed files under CICS/TS and other programming techniques.

  4. Tuning NSR Files in CICS/TS – this section addresses the tuning of Non-Shared resource files.  A review of what types of files should be placed in NSR and which should be moved to LSR.  The way to compute the correct buffering and number of strings are also covered.

  5. Tuning CICS/TS LSR Buffers – this section addresses tuning LSR files with the emphasis on the look-aside hit ratio.  However, there is other less known facts regarding the tuning of LSR files that are addressed in this presentation including the use of multiple pools, number of strings and buffer reconciliation.  Also, a review of which files should or should not be placed into and LSR processing is discussed in detail.

  6. Tuning the Index CISZ – this section addresses a little known tuning area regarding the index CISZ.  Most installations default the index CISZ.  The algorithm used by VSE is relatively good but in some cases you want to control the CISZ assigned for better performance.  This section covers the index CISZ tuning in detail.

  7. Reviewing VSAM Free Space – this section goes into the use of VSAM free space to control CI/CA splits.  It covers the importance of avoiding CI/CA splits in an on line environment and addresses some of the incorrect recommendations that exist in the documentation.  This section also covers CI and CA fragmentation.

  8. Reviewing the DB2 Interface – this topic discusses the major items that require attention to improve the CICS and DB2 communications.  The concept of Threadsafe applications is reviewed and the effect of not having threadsafe applications.  The correct and incorrect use of protected, unprotected and pool threads is discussed.

See Course Agenda

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